From fb2d35f2875967b92af9e1e7d31724ce0456fa83 Mon Sep 17 00:00:00 2001 From: Nathan Thomas Date: Mon, 6 May 2024 10:47:32 -0700 Subject: feat: add verible formatter for SystemVerilog (#391) * Add verible formatter * Add verible to README formatter list * Update description * Formatting * Formatting attempt again * lint: apply stylua --------- Co-authored-by: Steven Arcangeli --- lua/conform/formatters/verible.lua | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 lua/conform/formatters/verible.lua (limited to 'lua') diff --git a/lua/conform/formatters/verible.lua b/lua/conform/formatters/verible.lua new file mode 100644 index 0000000..6a58d76 --- /dev/null +++ b/lua/conform/formatters/verible.lua @@ -0,0 +1,9 @@ +---@type conform.FileFormatterConfig +return { + meta = { + url = "https://github.com/chipsalliance/verible/blob/master/verilog/tools/formatter/README.md", + description = "The SystemVerilog formatter.", + }, + command = "verible-verilog-format", + args = { "--stdin_name", "$FILENAME", "-" }, +} -- cgit v1.2.3-70-g09d2